US Chips

The National Institute of Standards and Technology (NIST) of the U.S. Department of Commerce has released its Chips R&D Chiplet Interfaces report, aimed at bolstering semiconductor manufacturing in the U.S. The NIST’s Chips Research and Development Office (CHIPS R&D) is driving efforts to connect research institutions with industry players and promote the adoption of effective technical standards.

To support this initiative, CHIPS R&D has developed a standards roadmap aligned with the goals of the U.S. Chips Act, private sector needs, and the U.S. National Standards Strategy. The standardization priorities were discussed at the Standards Summit held in Washington D.C. in September 2023, leading to the identification of five key focus areas:

  1. Chiplets
  2. Digital Twins
  3. Data Interoperability
  4. Supply Chain Security and Resilience
  5. Advanced Packaging and Heterogeneous Integration

Following the Summit, two additional workshops were held to focus on Chiplets and Digital Twins.

 

Workshop on Chiplets

The first workshop addressed the role of technical standards for physical and logical interfaces in enabling chiplet-based architectures within the semiconductor and microelectronics industries. The following technical gaps in Chiplet Interfaces were identified:

  1. System optimization (modeling, simulation, and testing standards)
  2. Security and traceability testing standards
  3. General testing and verification standards (outside of security)
  4. Interconnection protocols
  5. Chiplet abstraction (e.g., process design kits (PDK))
  6. Reliability and failure analysis standards

 

Workshop on Digital Twins

The second workshop focused on the technical standards required to support reliable, secure, and high-quality manufacturing processes through digital twins, and to enable trusted supply chains. The following Digital Twin for Semiconductor Manufacturing Technical Standards Gaps were identified:

  1. Interoperability (data models, digital twin interfaces, communication between digital twins)
  2. Digital twin taxonomy and definitions
  3. Security (data provenance, traceability, digital thread)
  4. Existing standards (database of standards, analysis of standards, governance)
  5. Testing, validation, and verification (reliability testing, uncertainty verification, benchmarking, new metrics development)
  6. Development of benchmark and metrics models for specific use cases

 

Recommendations for Semiconductor Standardization

Participants of the workshops also provided the following recommendations to advance standardization in the semiconductor sector:

  1. Foster collaboration among Standards Setting Organizations (SSOs) and Standards Development Organizations (SDOs)
  2. Introduce incentives to encourage collaboration between SSOs/SDOs
  3. Promote standards education within the supply chain
  4. Enhance identification of priority standards in key areas
  5. Conduct assessments of existing standards
  6. Develop standards for chiplets in relation to digital twins

 

These insights have a pivotal role for the global semiconductor industry. In particular the recommendation on standardisation are key to shape the future of semiconductor manufacturing, support innovation, and ensure the security and resilience of the industry.

 

For more detailed information, please refer to the full report.

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